by Blog Admin | Apr 23, 2024 | VLSI
Key Roles: Candidate must have hands-on experience and knowledge of SRAM/ROM compilers or custom memories on various process nodes like 7nm, 14nm, 16nm, 28nm, 45nm, 65nm etc. Candidate must have very good understanding of memory architectures, Transistor level circuit...
by Blog Admin | Apr 23, 2024 | VLSI
Key Roles Responsible for Memory Compiler layout development and verification. Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM. Perform layout verification like...
by Blog Admin | Apr 23, 2024 | Front End Design & Verification
Key Roles Experienced in rtl design using verilog / system Verilog Asic designers with experiences in all aspects of rtl design flow from specification/microarchitecture definition to design and verification, timing analysis, dft and implementation Integration, rtl...
by Blog Admin | Apr 23, 2024 | VLSI
Key Roles – Responsible for Design and development of standard cell layouts. Perform layout verification like LVS/DRC/Latch up, quality check and documentation. Responsible for on-time delivery of cell and library level layouts with satisfactory quality....
by Blog Admin | Apr 23, 2024 | VLSI
Role and Responsibilities Proficient in Designing at least one of the following Analog IPs: - Data Converters: Delta-Sigma, ADCs, SAR-ADCs; Current Steering/R2R high speed/precision DACs - Power Management: High Voltage/Current LDOs - References: Clocking IPs like...
